test sending via ISP

"John (Liberty) Bell" wrote in message
ups.com...
wrote:
John (Liberty) Bell wrote:
wrote:

Finally you have perhaps the biggest problem of
measuring the switch-off of the signal with millisecond
accuracy through a receiver chain with a bandwidth of
less than 1 Hz which is what was needed to hold lock
on the carrier. That applies whichever method of timing
you use at the transmitter.

Notwithstanding my prior comment on this point, it is obvious that many
positions in this receiver chain have much higher frequency responses
than 1 Hz.

True but the siganl is far les than the noise prior to
the filter so not accessible. More below.

You are confusing me here. We seem to be talking about several filters
simultaneously.

There are several filters involved and you seemed to be
discussing tapping off a signal from earlier in the chain
where the bandwidth was wider.

Furthermore, in a feedback loop, it is no longer
meaningful to discuss earlier and later, only physical points in the
loop.

Again you were discussing "positions in this receiver chain
[which] have much higher frequency responses". Those are
before the phase-locked loop where the narrowband filter
resides.

Before taking your points separately, the manuals
can be found he

http://deepspace.jpl.nasa.gov/dsndocs/810-005/

The index lists them by number on the various pages, the
100 series numbers are on the "Space Link Interfaces"
page and the 200 series on "Station Data Processing".

Clearly, at one point we must have a high Q bandpass filter which is
tuned to the carrier frequency of ~ 2 gig. Its frequency response is,
presumably, the carrier frequency + - 1 Hz

It isn't that simple. The dish has a low-noise amplifier
(LNA) in the pedestal room which amplifies the whole S-band
range from 2270 MHz to 2300 MHz. A structural diagram is
shown in manual 203 figure 15 on page 34 and functional
block diagrams are given in manual 101, pages 26/27.

The "D/C" in manual 203 figure 15 is a 'downconvertor'
which is further detailed in the manual 209. Read para
2.3 on page 7 and look at Figure 2 on page 10. The
amplified signal from the LNA is heterodyned to an IF
frequency of 300MHz, then it is filtered with a bandwidth
from 265MHz to 375MHz (centred at 320 MHz) and that is
then heterodyned to a centre of 64MHz. That signal is
then digitised at 8 bit resolution and a sample rate of
256 M-samples/s and fed to the digital down-convertor
(DDC) which extracts subchannels of 16MHz width.

Clearly at another point we must have a low pass filter providing a
control signal. Its effective frequency response is, presumably, 0 to
1Hz

I would be happy to stand corrected on this, but I don't think these
two 1Hz figures are the same thing.

This very narrow band filtering is done in the digital
domain and is described in manual 207. Start with section
4 on page 11, mainly the first two paragraphs. You can
probably skip para 4.1 though the first three paras on
page 13 add useful background to the process for
determining when the system is "in lock".

Go on to para 4.2 and read the first two paragraphs,
and note the graph of Figure 4 on page 19.

It is this loop which can go down to 0.01 Hz but note
the first para of 4.2 says "Once phase-lock is declared
at this bandwidth, the loop bandwidth is gradually
reduced to its final value - the desired operational
value - in a manner consistent with the retention of
phase-lock." The trouble is I don't know what the
'desired operational value' was at any time. In the
latter days at extreme range I am sure it was 0.01Hz
but in previous years they might have selected a
wider value. Anyway that means the filter would ring
with a decay time constant of 16s, 1/(2 pi bandwidth).

As you said above, there were earlier stages with up
to 30MHz analogue bandwidth or 16MHz digitized but
these would contain vastly more background noise than
signal.

George